I was wondering if anyone could tell me if the Gertboard has the i2c clock and data pins from the ATmega available anywhere. I just got a new toy (http://adafru.it/1049), and I want to play. I assumed when I bought it that they would be there and it would be in the manual, but I can't find it in the manual at all.
Thanks in advance,
Rick
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I2C clock and data pins
There are 10 types of people in this world. Those that understand binary, and those that don't.
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Re: I2C clock and data pins
You can use I2C from the Pi side - They are brought out on the long row of pins in-front of the Pi connector as GP0 and GP1 (these really will be GP2 and GP3 on a Rev 2 board)rickseiden wrote:I was wondering if anyone could tell me if the Gertboard has the i2c clock and data pins from the ATmega available anywhere. I just got a new toy (http://adafru.it/1049), and I want to play. I assumed when I bought it that they would be there and it would be in the manual, but I can't find it in the manual at all.
Thanks in advance,
Rick
So you can connect into them there. You don't really need the Gertboard for I2C though - you can't buffer them as such, but if you're using the Gertboard for other things, then they're there.
On the ATmega, the I2C pins are alternative functions of the Analog pins. Port C5 is the Clock (SCL) and C4 is Data (SDA). You can set the internal pull-ups in the ATmega or use external ones. (prob. best to use external ones)
-Gordon
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Re: I2C clock and data pins
You do not need to add pull-up resistors as they are already present.On the ATmega, the I2C pins are alternative functions of the Analog pins. Port C5 is the Clock (SCL) and C4 is Data (SDA). You can set the internal pull-ups in the ATmega or use external ones. (prob. best to use external ones)
Just a warning for further development: There is know bug in the BCM2835 I2C interface.
The clock stretching is a bit terribly broken so you have the be very careful what you are doing.
I have a program running on the ATmega. I see no errors provided:
1/ I use a 100KHz I2C clock.
2/ My Atmega interrupt routine is extremely efficient.
I still have to test what happens if multiple interrupts occur at the same time as I don't know
what the Amega interrupt priority is.
Re: I2C clock and data pins
Hi Gert.
Can you elaborate on the known bug in the BCM2835 I2C?
I've been doing something with an I2C RTC board and get errors at boot time, that suddenly disapear after a few minutes.
Up till now I've been assuming the RTC board has a fault, but if its down to a bug in the BCM2835 I2C, then I may as well give up till it is patched in the OS (assuming it can be patched of course).
Can you elaborate on the known bug in the BCM2835 I2C?
I've been doing something with an I2C RTC board and get errors at boot time, that suddenly disapear after a few minutes.
Up till now I've been assuming the RTC board has a fault, but if its down to a bug in the BCM2835 I2C, then I may as well give up till it is patched in the OS (assuming it can be patched of course).
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Re: I2C clock and data pins
There is a bug in the clock-stretching code. The 2835 does not recognize clock stretching in the first half (high) clock cycle.
The slave pulls the clock down and releases it later. If the release is towards the end of the high clock period you get clock spikes.
(I found this by connecting a scope)
Then the master and slave have a different opinion if there was a clock or not. So they get out of sync where the master
thinks there was a clock and the slave thinks there was no clock, or vice versa.
I have tried two solutions:
1/ Use a slow (100KHz) I2C clock and make sure the slave responds very, very fast.
So despite the clock stretching, the clock high period is long enough for both master and slave to see it.
2/ Use a fast (400KHz) I2C clock and make sure the slave is very very slow so the clock is stretched far into the low clock period.
Beware: I have not tried either yet with massive, long bulk data transfers to see if it always works!
By the way: I also have an I2C Real-Time-Clock clock circuit but I have no idea how to write a driver to access it.
The slave pulls the clock down and releases it later. If the release is towards the end of the high clock period you get clock spikes.
(I found this by connecting a scope)
Then the master and slave have a different opinion if there was a clock or not. So they get out of sync where the master
thinks there was a clock and the slave thinks there was no clock, or vice versa.
I have tried two solutions:
1/ Use a slow (100KHz) I2C clock and make sure the slave responds very, very fast.
So despite the clock stretching, the clock high period is long enough for both master and slave to see it.
2/ Use a fast (400KHz) I2C clock and make sure the slave is very very slow so the clock is stretched far into the low clock period.
Beware: I have not tried either yet with massive, long bulk data transfers to see if it always works!
By the way: I also have an I2C Real-Time-Clock clock circuit but I have no idea how to write a driver to access it.
Re: I2C clock and data pins
There,s no shortage of info on setting up an RTC in the forums, there seems to be quite a few drivers already. What chip have you got?
Re: I2C clock and data pins
Unsure if that's a question, but here's an answer anyway.Gert van Loo wrote:I still have to test what happens if multiple interrupts occur at the same time as I don't know what the Amega interrupt priority is.
From the ATmega328p datasheet (page 9):
The Interrupt Vector table can be found on page 65 (chapter 12.4).All interrupts have a separate Interrupt Vector in the Interrupt Vector table. The interrupts have priority in accordance with their Interrupt Vector position. The lower the Interrupt Vector address, the higher the priority.
Also related (on page 14):
http://www.atmel.com/Images/Atmel-8271- ... asheet.pdfWhen an interrupt occurs, the Global Interrupt Enable I-bit is cleared and all interrupts are disabled. The user software can write logic one to the I-bit to enable nested interrupts. All enabled interrupts can then interrupt the current interrupt routine. The I-bit is automatically set when a Return from Interrupt instruction – RETI – is executed.
Re: I2C clock and data pins
About the I2C-clock-stretching-bug: I've analyzed it in detail, documented it and looked for workarounds.
See:
See: