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That's going to be tricky then, unless you can hook up a UART.

Have you tried asking the designer of the board? https://github.com/NebraLtd/nebra-lora-hardware/issues

What does "lsusb" show?

Have you tried:

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dtoverlay=dwc2,dr_mode=host

?

Deleted strange rant/possible AI spam (and well-reasoned responses to it).

That patch was merged late April, so your current kernel (Tue May 30) includes it.

As there should only be one set of pull-ups per bus, unless Grove are completely clueless (which seems unlikely), the devices will have no pull-ups.

GPIO 8 and 9

Which pin/GPIO numbering scheme are you using? The I2C bus with the pull-ups is on SoC/Broadcom GPIOs 2 & 3, which are on header pins 3 & 5.

Are the other devices all being powered from the Pi via the 4-pin connectors? The Zero W isn't capable of powering much in the way of external peripherals. Do you have a way to give at least one an independent power supply?

And the early bootloader does also parse it, hence the diagnostic messages above.

It looks fine to me: $ grep gpio /boot/config.txt #dtoverlay=gpio-ir,gpio_pin=17 #dtoverlay=gpio-ir-tx,gpio_pin=18 gpio=2=op,dl which leads to: RPi: BOOTLOADER release VERSION:8ba17717 DATE: 2023/01/11 TIME: 17:40:52 ... FAT32 clusters 130554 Read config.txt bytes 2130 hnd 0x6702 gpio_cmd: '2=op,dl'...

What is in boot.scr? Any references to fdt are particularly relevant.

I made a mistake - the sd_overclock parameter is currently only supported on the older Pis, and was intended to boost the clock as well as reduce it. Something similar could probably added to the sdhci-iproc driver used by BCM2711, but it isn't there yet. And you're right about the sdhci-iproc drive...

SD cards are meant to run as fast as they can, which for that interface is 50MHz. Linux has no standard way to change that. However, the Pi MMC/SD drivers have an extra setting that allows the clock to be changed. To run the interface at 20MHz, add "dtparam=sd_overclock=20" to confíg.txt. ...

> how i can enable the flow control of uart5? You've done enough to enable the flow control signals from the UART to appear on the 40-pin header, but: 1. The UART may not be configured to use them. RTS (strictly, nRTS) is driven low when the UART is ready to receive data. Similarly, it looks for low...

> in which version of kernel shows ttyAMA5?

The patch appeared in 6.1.26, so it should be included in yours. "ls /dev/ttyAMA*" if you're in doubt. Note that you might get different results if the Device Tree (dtb) files weren't also updated.

To see if the overlay has been applied correctly and is being used by the kernel, what does "raspi-gpio get 12-15" show?

Note that with one of the latest kernels, enabling UART5 results in /dev/ttyAMA5 appearing, not /dev/ttyAMA1.

Did you run both of those images on the same board? Did you notice that the serial number also changed? My guess is that U-boot has been configured to use a pre-canned, pre-patched DTB, rather than inherit one from the firmware (which U-boot can easily do).

It's certainly nothing to worry about, provided the cpuinfo value matches the device you paid for. I don't know how the value programmed into the OTP is obtained - whether it is supposed to change when the RAM size on the production line is changed, whether they all get the same fixed value, or some...

I can see something similar with an SPI display. I think it's caused by something in this PR: https://github.com/raspberrypi/linux/pull/5458

I couldn't say - I'm not an electronics engineer. It's also possible that the RX input on the CM4 is damaged.

The firmware has always reserved the right to control the core clock without any form of handshake with or limitation by the ARM, as a way of preventing thermal runaway. If ARM performance is not a limitation for you then you may find that switching the powersave governor is a suitable way to preven...

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pin 1(5V) --> 5V

That's a bit alarming - the GPIOs are 3.3V, and may explain why you can't get a response.

It's a subject that's come up more than once, and there should probably be a more portable way to achieve the same effect. "core_freq=max" or "core_freq=min" appeals, but the parser is expecting integers so that doesn't work. Magic values signifying max and min would be easy to a...

Doh - corrected. I wish I could say it was the first time I've got that wrong.

Unfortunately the SPI clock is derived from the core clock, and with the default configuration the core clock varies with load. On any Pi you can lock the core lock by giving the config.txt settings "core_freq" and "core_freq_min" the same value, e.g. 500 on a Pi 4. `force_turbo=...

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