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by rst
Mon Nov 29, 2021 11:01 am
Forum: Bare metal, Assembly language
Topic: Raspberry Zero 2 - Multicore contention?
Replies: 21
Views: 1014

Re: Raspberry Zero 2 - Multicore contention?

Does this mean, that the disturbances are only caused by "conflicting" L2 cache failures (core 0/1)? Yes, when one core has to refill a L1 cache line, and the other does not need this at the same time, there should be no "conflict". Wouldn't switching the cache off get rid of &q...
by rst
Sat Nov 27, 2021 12:05 pm
Forum: Bare metal, Assembly language
Topic: Raspberry Zero 2 - Multicore contention?
Replies: 21
Views: 1014

Re: Raspberry Zero 2 - Multicore contention?

OK, this could work.
by rst
Sat Nov 27, 2021 10:32 am
Forum: Bare metal, Assembly language
Topic: Raspberry Zero 2 - Multicore contention?
Replies: 21
Views: 1014

Re: Raspberry Zero 2 - Multicore contention?

so a contiguous 8kb buffer (even if its only 64 byte aligned), will occupy cache line in each of the 128 sets, and only use 25% of the cache a 32kb buffer would occupy every cache line in every set, but alignment may become more tricky Yes, but what happens, if some cache line has been used before?...
by rst
Sat Nov 27, 2021 9:21 am
Forum: Bare metal, Assembly language
Topic: Raspberry Zero 2 - Multicore contention?
Replies: 21
Views: 1014

Re: Raspberry Zero 2 - Multicore contention?

a given cache line can only ever be owned by one core at a time so if 2 cores are reading a variable within the same 64byte cache line, performance will suffer each time you read a variable, it has to move that entire 64byte line over to a different L1d, to pass ownership over Is this valid for the...
by rst
Fri Nov 26, 2021 8:02 pm
Forum: Bare metal, Assembly language
Topic: Raspberry Zero 2 - Multicore contention?
Replies: 21
Views: 1014

Re: Raspberry Zero 2 - Multicore contention?

I'm not an expert in cache organisation, but as I understand it, it doesn't help, that the used memory regions are far away from each other. Look here: https://en.wikipedia.org/wiki/Cache_placement_policies#Set-associative_cache The Cortex-A53 of the RPi Zero 2 W has set-associative L1 and L2 caches...
by rst
Fri Nov 26, 2021 3:22 pm
Forum: Bare metal, Assembly language
Topic: Raspberry Zero 2 - Multicore contention?
Replies: 21
Views: 1014

Re: Raspberry Zero 2 - Multicore contention?

Malban wrote:
Thu Nov 25, 2021 8:21 pm
Actually just READING the memory is enough to cause jitter in core 1.

Can this be "just" BUS contention... can this be resolved?
Yes, of course both cores compete for bus time, when accessing the RAM at the same time. You can only try to avoid accessing it by using the caches.
by rst
Mon Nov 22, 2021 5:55 am
Forum: General
Topic: Programming external QSPI flash via SWD
Replies: 4
Views: 266

Re: Programming external QSPI flash via SWD

You may have a look at this new SWD program loader for the Pico: https://github.com/rsta2/circle/tree/develop/addon/pico It halts the RP2040, loads a program into RAM and starts it. The links, you have posted, are for a different micro-controller. The RP2040 needs these requests to accomplish the ta...
by rst
Tue Nov 16, 2021 10:40 pm
Forum: Bare metal, Assembly language
Topic: Why are the armstub files needed?
Replies: 13
Views: 403

Re: Why are the armstub files needed?

I did test USPi with AArch64 using Circle some time ago. Please write an email to me for discussions about technical details. The address is on GitHub.
by rst
Tue Nov 16, 2021 9:45 pm
Forum: Bare metal, Assembly language
Topic: Why are the armstub files needed?
Replies: 13
Views: 403

Re: Why are the armstub files needed?

Yes, it's better, but also not perfect. AFAIK they spent a lot effort to get this running reliable in the RPi Linux kernel and use the FIQ for the USB timing on RPi 1-3 and Zero. USPi and Circle does not do this. I guess, the best chance to get isochronous endpoints working would be on the xHCI cont...
by rst
Tue Nov 16, 2021 8:53 pm
Forum: Bare metal, Assembly language
Topic: Why are the armstub files needed?
Replies: 13
Views: 403

Re: Why are the armstub files needed?

I haven't worked on USPi for some time. Just try it, but it would say, it is not designed for supporting isochronous traffic. The timing is not perfect, which is not a big problem with bulk and control transfers, but if you want to continuously transfer audio data without breaks, this will be diffic...
by rst
Tue Nov 16, 2021 5:18 pm
Forum: Bare metal, Assembly language
Topic: Why are the armstub files needed?
Replies: 13
Views: 403

Re: Why are the armstub files needed?

I had already implemented this, if it would be easy. ;)
by rst
Tue Nov 16, 2021 11:55 am
Forum: Bare metal, Assembly language
Topic: Why are the armstub files needed?
Replies: 13
Views: 403

Re: Why are the armstub files needed?

BTW, I had a different question, but since it's related to Circle I ask it here : could you recommend an I2C sound card to me? One that would work with the I2S sound driver of Circle? My objective would be to get sound input from a microphone. You are welcome. With Circle tested sound cards are lis...
by rst
Tue Nov 16, 2021 10:38 am
Forum: Bare metal, Assembly language
Topic: Why are the armstub files needed?
Replies: 13
Views: 403

Re: Why are the armstub files needed?

What I did not understand is why Circle does not boot in EL3 mode, and perform itself this initialization step? Is this not possible/difficult on the Pi4? With the "kernel_old=1" setting in config.txt you can boot in EL3. To be more compatible with the other RPi models I prefer to use the...
by rst
Tue Nov 16, 2021 7:01 am
Forum: Bare metal, Assembly language
Topic: Why are the armstub files needed?
Replies: 13
Views: 403

Re: Why are the armstub files needed?

The reason why specific ARM stubs are used with Circle on the RPi 4 is that the GIC-400 interrupt controller has registers, which can only be accessed in secure mode (EL3). These registers are especially needed to use the FIQ. Circle installs a secure monitor in the ARM stub, which allows to return ...
by rst
Sun Oct 03, 2021 4:34 pm
Forum: Bare metal, Assembly language
Topic: Raspberry PI 4: the clock of System Timer in baremetal mode
Replies: 2
Views: 623

Re: Raspberry PI 4: the clock of System Timer in baremetal mode

The system timer of the RPi 4 runs at 54 MHz by default. This value can be modified by programming a different prescaler at 0xFF800008. See section 3.1.1 in this document for info on how to calculate the prescaler value. The prescaler was introduced with the BCM2836 SoC of the RPi 2 and still exists...
by rst
Mon Apr 26, 2021 6:04 am
Forum: Bare metal, Assembly language
Topic: 4K display modes on Raspberry Pi 4 without KMS?
Replies: 2
Views: 1054

4K display modes on Raspberry Pi 4 without KMS?

Is it possible to use 4K display modes on the Raspberry Pi 4 without Linux kernel support in bare metal? What is the maximum display resolution supported by the firmware itself?
by rst
Mon Apr 19, 2021 4:43 am
Forum: Bare metal, Assembly language
Topic: [solved] USB access on a PiZero
Replies: 5
Views: 1529

Re: [solved] USB access on a PiZero

@Malban Interesting idea to poll by simply calling the interrupt handler! The interrupt handler checks, if an interrupt condition is asserted and if not, it does nothing. So this works. But the "virtual" interrupt latency may be as bad as 20ms in this case (50 polls per second). This will ...
by rst
Sun Apr 18, 2021 8:10 am
Forum: Bare metal, Assembly language
Topic: [solved] USB access on a PiZero
Replies: 5
Views: 1529

Re: USB access on a PiZero

You are welcome. Your project is interesting and has hard real-time requirements. For a similar project I was asked before, if I could rewrite the USB driver to work with polling. Personally I'm not a friend of this, because it makes the design more difficult, especially for a general purpose librar...
by rst
Sat Apr 17, 2021 5:18 pm
Forum: Bare metal, Assembly language
Topic: [solved] USB access on a PiZero
Replies: 5
Views: 1529

Re: USB access on a PiZero

This is unusual. There may be USB keyboards, which do not work with Circle, but one of these devices, you have tried, should work at least. Have you tried this hardware configuration with Raspberry Pi OS for comparison? You may try the setting usbpowerdelay=2000 in the file cmdline.txt on the SD car...
by rst
Fri Apr 09, 2021 8:49 pm
Forum: Bare metal, Assembly language
Topic: Read/write SD card on Raspberry Pi 4?
Replies: 8
Views: 1593

Re: Read/write SD card on Raspberry Pi 4?

do you have a working source code somewhere? Hi @bzt, here it is. I've searched for 0x38041 in Circle to see what mailbox call you were referring to, but I had no luck finding it. Try 0x00038041 and it will work. ;) In order to make my code RPi4 compatible, I've changed the address to eMMC2, I've a...
by rst
Sat Apr 03, 2021 5:14 am
Forum: Bare metal, Assembly language
Topic: Read/write SD card on Raspberry Pi 4?
Replies: 8
Views: 1593

Re: Read/write SD card on Raspberry Pi 4?

there are also 2 external GPIO lines, to control the IO voltage and SD power, which must be accessed via the mailbox Yes, I forgot to mention, that the driver is disabling the 1.8V power, by writing a 0 to the external GPIO pin 4 using the property mailbox function 0x38041, because it is not using ...
by rst
Fri Apr 02, 2021 8:33 pm
Forum: Bare metal, Assembly language
Topic: Compile ARM 32 with raspberry os 64 bit (raspberry pi 4b 8 gb ram)
Replies: 4
Views: 2053

Re: Compile ARM 32 with raspberry os 64 bit (raspberry pi 4b 8 gb ram)

One of these packages may help: https://packages.debian.org/search?suite=buster&arch=arm64&searchon=names&keywords=gcc-arm- For bare metal programming gcc-arm-none-eabi should be the right one. I haven't tried this on RPi OS 64, but this may work to install it: sudo apt install gcc-arm-n...
by rst
Fri Apr 02, 2021 8:31 pm
Forum: Bare metal, Assembly language
Topic: Read/write SD card on Raspberry Pi 4?
Replies: 8
Views: 1593

Re: Read/write SD card on Raspberry Pi 4?

I was trying for months to get my SD card driver working on the RPi 4. The relatively obvious modifications required are to use the base address of EMMC2 at 0xFE340000 and to fetch the base clock rate from the firmware with clock ID 12 for EMMC2. But this was not enough. Then I found that there is d...
by rst
Sat Mar 13, 2021 1:59 pm
Forum: Bare metal, Assembly language
Topic: RPI4 cache
Replies: 7
Views: 1081

Re: RPI4 cache

Great information thanks. I intend to dive into the datasheet for the processor as I've found that a sound knowledge of the hardware is essential - I knew the SHARC datasheet backwards. I have one more question - the specification for the RPI4 says the 4 cores run at 1500MHz - why is the bare metal...

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