HAT for stacking TV hats

[PetrSmetana]

Hi, I read some threads here already about possible stacking of TV hats.

viewtopic.php?t=227520#p1415904

This is the answer I kind of like - except the part where it's not possible for the hobbyist

If I understand it well, the main problem is in the CS, which needs to be dedicated for each device.

So If I would build a new HAT with connectors for multiple TV HATS, where the CS of each TV HAT card would be dedicated to another GPIO port, then I would probably need to modify the device tree compatibility - somehow (I don't know how - yet) here https://github.com/raspberrypi/linux/bl ... verlay.dts

place this file into /boot/dts/overlays/rpi-tv-overlay.dts ... or do I have to go into the core/modules source code and do the modification for multiple TV HAT support also there?

Are there any other challenges?

It would be cool, to be able to save the PRi devices these days, when there is a huge lack of them on the market.

[B.Goode]

If you are going to design a HAT, presumably you will have read the specification of HAT as defined by Raspberry PI:
https://github.com/raspberrypi/hats

[DougieLawson]

I read some threads here already about possible stacking of TV hats.

You can ignore them all as HATs are not stackable.

[PetrSmetana]

I read some threads here already about possible stacking of TV hats.

You can ignore them all as HATs are not stackable.

Ok let's assume, that I'll put away the "stackable" word. Where should I start to be able to design a hat, which would allow multiple TV HATs to operate together with one RPi board.

I somehow understand, how the SPI bus works in general - so there is just need to have own CS wire for each device. The other thing is the system logic itself, which would allow to handle multiple spi connected devices. Am I wrong? Why I can't map free GPIO ports to be able to act as a CS for other devices?

What are other challenges which are standing in the way? Here I saw that TV HAT is also using I2C - https://pinout.xyz/pinout/tv_hat which can be solved by TCA9548A I2C multiplexer.

I would love to start digging deeper, I'm just asking for a direction to reduce the time. thx

[rpdom]

What are other challenges which are standing in the way? Here I saw that TV HAT is also using I2C - https://pinout.xyz/pinout/tv_hat which can be solved by TCA9548A I2C multiplexer.

That won't work. The system i2c is used to identify the HAT. The EEPROM is at a fixed address (0x50?). There can only be one HAT EEPROM on that bus (There are certain exceptions like the PoE HAT).

I would probably "de-HAT" the boards by not connecting the i2c lines. This would mean the Pi can no longer auto detect the boards, but they can be enabled manually. That coupled with changing the CS line will possibly work with some custom overlays as long as the driver supports multiple devices.

[PetrSmetana]

What are other challenges which are standing in the way? Here I saw that TV HAT is also using I2C - https://pinout.xyz/pinout/tv_hat which can be solved by TCA9548A I2C multiplexer.

That won't work. The system i2c is used to identify the HAT. The EEPROM is at a fixed address (0x50?). There can only be one HAT EEPROM on that bus (There are certain exceptions like the PoE HAT).

I would probably "de-HAT" the boards by not connecting the i2c lines. This would mean the Pi can no longer auto detect the boards, but they can be enabled manually. That coupled with changing the CS line will possibly work with some custom overlays as long as the driver supports multiple devices.

Ok, so let's assume, that if the purpose is only for detection, there might be eeprom which would detect a "MULTI TV HAT HAT" ... and it might setup correct driver afterwards. Which would have modified CS to GPIO ports. Is this right?

[thagrol]

I read some threads here already about possible stacking of TV hats.

You can ignore them all as HATs are not stackable.

They are if you disable the EEPROM check in config.txt and do the configuration manually.

[thagrol]

Are there any other challenges?

Bandwdith of the SPI bus? Is there enough to support more than one tuner?

[rpdom]

Ok, so let's assume, that if the purpose is only for detection, there might be eeprom which would detect a "MULTI TV HAT HAT" ... and it might setup correct driver afterwards. Which would have modified CS to GPIO ports. Is this right?

That will probably work, if you take into account thagrol's point about the SPI bus capacity.

[6by9]

Connect one TV HAT directly through using SPI0 on GPIOs 8-11. (Also route some power).
Connect one TV HAT to SPI1 on GPIOs 18-21 (along with some power).
Do not connect GPIOs 0&1 through from the 40pin header to the TV HATs.
Create a new dtoverlay for the pair of TV HATs.
Either add a HAT EEPROM of your own to GPIOs 0&1, or manually load the new overlay.

You may be able to connect multiple TV HATs to the same SPI bus with different chip selects. The SPI interface is meant to be running at 50MHz, so you can probably get a couple of DVB-T streams on there (typically about 6-7Mbit/s for HD streams).

[PetrSmetana]

Connect one TV HAT directly through using SPI0 on GPIOs 8-11. (Also route some power).
Connect one TV HAT to SPI1 on GPIOs 18-21 (along with some power).
Do not connect GPIOs 0&1 through from the 40pin header to the TV HATs.
Create a new dtoverlay for the pair of TV HATs.
Either add a HAT EEPROM of your own to GPIOs 0&1, or manually load the new overlay.

You may be able to connect multiple TV HATs to the same SPI bus with different chip selects. The SPI interface is meant to be running at 50MHz, so you can probably get a couple of DVB-T streams on there (typically about 6-7Mbit/s for HD streams).

I need to be able to reach 3-4 multiplexes simultaneously in our country to have full spectrum of reachable channels, so I need to have at least 3-4 TV HATS. That's why I would like to use one SPI channel with separated CS...

[drgeoff]

I need to be able to reach 3-4 multiplexes simultaneously in our country to have full spectrum of reachable channels, so I need to have at least 3-4 TV HATS. That's why I would like to use one SPI channel with separated CS...

Do you mean you want one SPI channel to simultaneously receive all the stations in all the multiplexes?

[PetrSmetana]

I need to be able to reach 3-4 multiplexes simultaneously in our country to have full spectrum of reachable channels, so I need to have at least 3-4 TV HATS. That's why I would like to use one SPI channel with separated CS...

Do you mean you want one SPI channel to simultaneously receive all the stations in all the multiplexes?

Exactly

[drgeoff]

I need to be able to reach 3-4 multiplexes simultaneously in our country to have full spectrum of reachable channels, so I need to have at least 3-4 TV HATS. That's why I would like to use one SPI channel with separated CS...

Do you mean you want one SPI channel to simultaneously receive all the stations in all the multiplexes?

Exactly

6b9 has written above "The SPI interface is meant to be running at 50MHz". Is thst compatible with your goal?

[6by9]

Do you mean you want one SPI channel to simultaneously receive all the stations in all the multiplexes?

Exactly

6b9 has written above "The SPI interface is meant to be running at 50MHz". Is thst compatible with your goal?

Barely.

In the UK a DVB-T mux is generally 64QAM and FEC 3/4 or 2/3 with a single mux carrying about 24 or 27Mbit/s.
DVB-T2 muxes are running as 256QAM and FEC 2/3, which is 40Mbit/s on a mux.
(I'm using https://ukfree.tv/transmitters/tv/Sandy_Heath as the info for more local transmitter, and details of DTG-3, DTG-6, and DTG-8 configurations).
SPI running at 50MHz has a minor overhead, but being only 1bit wide has a maximum throughput of 50Mbit/s. It's going to be just on the edge for a single SPI interface with one chip select. Trying to run multiple chip selects on the one interface is unlikely to cut it.

Pi4 does have more SPI interfaces. I haven't checked in detail how many you can actually route out through the alt mappings of the GPIOs available on the 40 pin header, but it looks like you should be able to get 4 of them with a single CS each.