colinh
Posts: 123
Joined: Tue Dec 03, 2013 11:59 pm

Late to the party. Porting aarch64 RPi3B+ to aarch64 RPi4B

Mon Jan 23, 2023 6:36 pm

I know this sort of things gets asked ad nauseam (at least, when a new processor comes out), but ancient posts seem to lose relevance with time :-/

Do I just need to:

* change peripherals base from 0x3f000000 to 0xfe000000

* add enable_gic=0 arm_peri_high=0 arm_64bit=1 to config.txt

I'm hoping mailboxes, MMU, SD/eMMC, DMA etc. haven't changed?

There's some code (like openocd ?) that just uses NOP loops (for very short delays). I guess these need to be modified?

PS. how does CPU throttling work? Is it automatic and only due to overheating? Or does Linux throttle down when it's idling?

colinh
Posts: 123
Joined: Tue Dec 03, 2013 11:59 pm

Re: Late to the party. Porting aarch64 RPi3B+ to aarch64 RPi4B

Wed Jan 25, 2023 1:53 pm

Hmmm. Well GPIO pull-up/down configuration seems to have changed...

Code: Select all

.equiv GPIO_GPPUD,              0x00000094          // RPi 1-3
.equiv GPIO_GPPUDCLK0,          0x00000098
.equiv GPIO_GPPUDCLK1,          0x0000009C
.equiv GPIO_Test,               0x000000B0

.equiv GPIO_PUP_PDN_CNTRL_REG0, 0xe4                // *** RPi4 changed! ***
.equiv GPIO_PUP_PDN_CNTRL_REG1, 0xe8
.equiv GPIO_PUP_PDN_CNTRL_REG2, 0xec
.equiv GPIO_PUP_PDN_CNTRL_REG3, 0xf0

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pmoore
Posts: 27
Joined: Thu Jun 28, 2018 9:53 am
Location: Neuss, Germany

Re: Late to the party. Porting aarch64 RPi3B+ to aarch64 RPi4B

Mon Jan 30, 2023 8:54 pm

That's a good start, but the hardware random number generator (rng) has changed, and usb now has a standard xhci controller over pcie (although the old usb interface is still present, and can be enabled in the config.txt, iirc). I believe the ARM is driven by a 54MHz crystal instead of a 19.2MHz now too.

There may be other things too, but those are the ones that I needed to update in my project.

If it helps, this is how I interface with both RNGs of rpi3b and rpi4: https://github.com/spectrum4/spectrum4/ ... rnel/rng.s

To determine at runtime if you are on a rpi3b or a rpi4b, read ARM register midr_el1 then AND with 0xfff0. 0xd030 => raspberry pi 3b.

Example: https://github.com/spectrum4/spectrum4/ ... #L465-L538

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rpdom
Posts: 21468
Joined: Sun May 06, 2012 5:17 am
Location: Chelmsford, Essex, UK

Re: Late to the party. Porting aarch64 RPi3B+ to aarch64 RPi4B

Mon Jan 30, 2023 9:17 pm

colinh wrote:
Wed Jan 25, 2023 1:53 pm
Hmmm. Well GPIO pull-up/down configuration seems to have changed...
Yes. You can actually read the current pull state on the BCM2711. Previous chips were write-only.
Unreadable squiggle

colinh
Posts: 123
Joined: Tue Dec 03, 2013 11:59 pm

Re: Late to the party. Porting aarch64 RPi3B+ to aarch64 RPi4B

Sat Feb 04, 2023 6:57 pm

rpdom wrote:
Mon Jan 30, 2023 9:17 pm
colinh wrote:
Wed Jan 25, 2023 1:53 pm
Hmmm. Well GPIO pull-up/down configuration seems to have changed...
Yes. You can actually read the current pull state on the BCM2711. Previous chips were write-only.
Ah, I was just wondering why raspi-gpio didn't say anything about the pull state on the RPi 3...

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