BOOTLOOP after reset on custom board

[themladypan]

Hello makers,

Intro:
I am trying to build sensors based on RP2040 MCU and I've been struggling with this problem for days now and can not solve it by myself.

The problem:
After burning .UF2 via USB or via SWD/OpenOCD the board runs perfectly. I can restart it through debugger and it works fine too - GPIO, peripherals, USB - everything. After power cycle OR pulling "RUN" pin low, the device won't boot up. The debugger says that it gets stuck in 'clock.c' -> 'bool clock_configure(...);' somewhere around lines 100-115. I can not guarantee this because it is accompanied by a lot of errors.

I have 10 pcs of custom boards from JLCPCB. 5 of them are working perfectly fine even after powercycle, 5 of them won't boot again. The boot to USB MASS device is always fine though.

What is not a problem:

• XOSC is okay
• Everything is soldered okay as it runs fine until reset/power cycle
• MCU tries to read from flash but it gets stuck in clock init

What I did so far:

• tested plain LED blink software with nothing but GPIOs, it works on more - 7 out of 10 PCBs, still not all of them.
• Raised PICO_XOSC_STARTUP_DELAY_MULTIPLIER from 128 up to 4096 - does not work.
• Raised PICO_FLASH_SPI_CLKDIV up to 64 - does not work either.
• Disabled watchdog - not an issue
• tried debug/release/different versions of SDK - still no improvement.

The problem is similar to this dead topic:
viewtopic.php?t=325897

I followed this design guide very precisely:
https://datasheets.raspberrypi.com/rp20 ... rp2040.pdf

I tried to compare it to official pico board on oscilloscope and I did not notice anything unusual. PCB and schematic attached.

Any hints guys? I like RP2040 A LOT and I definitely want to build things with it!

3V3 power supply:


1V1 core:


XOSC:


Call stack:


Schematic - MCU


Schematic Power


PCB:

[Lobo-T]

Are some copper and via layers turned off in that board image? It seems like a lot of ground connections are missing. C8 and C9 are connected to the crystal, but the other end seems to be connected to nothing.

[themladypan]

Ah yes, the PCB has GND turned invisible so you can examine the bottom routes, except of that everywhere is GND spilled with 0.127mm clearance to other tracks. As I said, the half of PCBs are working perfectly, half of them are working until reset only

[themladypan]

Dear makers

I fixed it! the solution was rather simple.

The boards are made with uncertain quality. Since I was building without any parameters, a "pico.h" board was used as reference for clock init (code which runs before PC enters the int main()). The PICO_FLASH_SPI_CLKDIV was not high enough for the code to run uncorrupted to my main function so my PICO_FLASH_SPI_CLKDIV was never defined.

I fixed it by making custom xerxes_rp2040.h file in src/Hardware/Board
where I defined:

Code: Select all

#ifndef PICO_FLASH_SPI_CLKDIV
#define PICO_FLASH_SPI_CLKDIV 32
#endif // !PICO_FLASH_SPI_CLKDIV

and I am passing it through cmake:

Code: Select all

...
set(PICO_BOARD "xerxes_rp2040")
set(PICO_BOARD_HEADER_DIRS "${CMAKE_CURRENT_LIST_DIR}/src/Hardware/Board")
...

now the firmware is being built and every board is running. I had to bump CLKDIV to 32 for every board to be functional so if anybody encounters such problem, try to fiddle with this divider.

You can close this thread now.
Cheers, Stanley

[arg001]

32 is very, very slow (unless overclocking). If it needs to be that slow it suggests something is wrong with the layout.

Is this a 4-layer PCB? If it is only 2 layers, the ground routing is very unsatisfactory.