Raspberry Pi 5 with PCIe NVMe M.2

[funkybassman]

Hi, for the RPi5, please include a PCIe NVMe M.2 connector on the bottom of the board so we don't have to be bottlenecked by the slow SD Card connector. Thanks!

[rpdom]

The spec for the Pi 5 is probably already pretty much finalised. The Pi 6 may already be discussed.

Although the Raspberry Pi people will note suggestions that are made on here, generally wish list threads will get locked. Especially as some people tend to go off on tangents,

[TheMindVirus]

Hi, for the RPi5, please include a PCIe NVMe M.2 connector on the bottom of the board so we don't have to be bottlenecked by the slow SD Card connector. Thanks!

The spec for the Pi 5 is probably already pretty much finalised. The Pi 6 may already be discussed.

Although the Raspberry Pi people will note suggestions that are made on here, generally wish list threads will get locked. Especially as some people tend to go off on tangents,

Nice suggestion, M.2 and mini-PCIe are becoming increasingly popular.
I'm really looking forward to what the Pi 5 could do for audio/visual projects.
Tangents *coughcough*: viewtopic.php?f=63&t=266330 - more Pi Pro than Pi 5

[W. H. Heydt]

Hi, for the RPi5, please include a PCIe NVMe M.2 connector on the bottom of the board so we don't have to be bottlenecked by the slow SD Card connector. Thanks!

You're not bottlenecked by the SD card interface. If your I/O is bottlenecked at all, it's by the considerably faster USB 3. To justify an M.2 connector, the SoC would need at least PCIe v.2 (BCM2711 has v.1) and ought to have 4 PCIe lanes (BCM2711 has 1). USB 3.1 (or 3.2) is a much more likely than an M.2 connector, and neither of those is at all likely any time soon (we maxed out at USB 2 for 7 years).

So...one really has to ask, what are you doing that requires that much I/O capability? (I'm not saying that there might not be a justification for it, but what is your specific use case? Or is it just an example of either PC envy or Walter Reuther's answer when asked what the UAW wanted?)

[fruitoftheloom]

Hi, for the RPi5, please include a PCIe NVMe M.2 connector on the bottom of the board so we don't have to be bottlenecked by the slow SD Card connector. Thanks!

Do you mean the Raspberry Pi 6B ?the 5B has more than likely been seriously thought about at PiTowers.

Also can you supply a BoM cost for this change ? and if the cost makes it a viable proposition considering the aim is a $35.00 price point !!


Your only other post was locked:

viewtopic.php?f=62&t=175899&p=1122152#p1122152

[ejolson]

Your only other post was locked:

viewtopic.php?f=62&t=175899&p=1122152#p1122152

That's too bad. Posting again, however, indicates a human is making the posts rather than a bot. Welcome to the forum!

[W. H. Heydt]

Hi, for the RPi5, please include a PCIe NVMe M.2 connector on the bottom of the board so we don't have to be bottlenecked by the slow SD Card connector. Thanks!

Do you mean the Raspberry Pi 6B ?the 5B has more than likely been seriously thought about at PiTowers.

Also can you supply a BoM cost for this change ? and if the cost makes it a viable proposition considering the aim is a $35.00 price point !!


Your only other post was locked:

viewtopic.php?f=62&t=175899&p=1122152#p1122152

That thread also shows that the OP is Unclear on the Concept of what the CM is and is for. This thread shows a certain amount of lack of clarity about what the Pi B-series boards are for and what the constraints on them are.

At the very least, the OPs desired additions would require a complete new SoC. While a new SoC will certainly happen for each succeeding generation of Pi, truly radical changes will likely be few and far between. While I wouldn't expect future Pis to stick with the 28nm node as long as the 40nm was kept, much of what he is asking for is of questionable value to Pis in general. What might be more to the point would be some sort of exposed high speed/very high speed interface that could be exploited by HATs, or something similar, but which wouldn't impose specific interfaces and associated costs on everyone.

[TheMindVirus]

People seem to be using these:
https://www.amazon.co.uk/Raspberry-Pi-A ... B072R6LCMT
I am not sure how well they work, or if it is possible to boot from such a HAT, but they connect via USB.

To get the best performance out of the new storage device, the Pi would indeed have to have a processor/chipset upgrade
to allow it to host M.2 directly at full speed. However, such devices use special codecs to send/receive large amounts of data using only a few bytes.
It is therefore possible for the M.2 Storage Device to be hosted on a slower bus such as the USB3 port the Pi already has.
The Pi4 does also have 1 lane of PCI, but that needs hardware changes to be made accessible by HATs etc.

[Heater]

If your really need PCIe NVMe M.2 on a Pi like SBC you can have it today:
https://www.nvidia.com/en-us/autonomous ... tson-nano/

It will cost you 3 or 4 times more, need a bigger PSU and is somewhat larger itself. That socket has to go somewhere.

Altogether a different product. Take your pick.

[trejan]

People seem to be using these:
https://www.amazon.co.uk/Raspberry-Pi-A ... B072R6LCMT
I am not sure how well they work, or if it is possible to boot from such a HAT, but they connect via USB.

The M.2 connector can carry PCI Express, USB and SATA. That HAT is a USB to SATA adapter so only useful for M.2 SATA cards. Putting in something that wants PCI Express like a NVMe SSD will do absolutely nothing.

[LTolledo]

Hmmm.... another "wish list".... might get axed soon..

Putting in something that wants PCI Express like a NVMe SSD will do absolutely nothing.

with the current state with the RPi4B.... there is no real advantage using NVMe SSD as against regular SSDs.
and those NVMe SSD setups cost more....
so just disadvantageous...

on RPi5(B)?.... wait.... my flux capacitor needs fixing....and the Mr. Fusion is being recalled...

a RPi6 microATX board version is much more "plausible"?

[chwe]

If your really need PCIe NVMe M.2 on a Pi like SBC you can have it today:
https://www.nvidia.com/en-us/autonomous ... tson-nano/

It will cost you 3 or 4 times more, need a bigger PSU and is somewhat larger itself. That socket has to go somewhere.

Altogether a different product. Take your pick.

with 99$ the jetson nano is less than 3 times more (35$x3=105$).. and the jetson nano is 4GB by default so we would need to compare it with the 55$ pricepoint of the 4b 4GB version. Anyway for NVMe on a RPi like device I would rather propose something like the NanoPi M4V2 (70$ + 5$ for the NVMe hat), RockPro64 (79$ + whatever you pay for an PCIe to M.2 adapter) or RockPi 4b (75$ + 7.99$ for the M.2 Extend Board) all 3 with 4GB ram. So based on the 55$ price-point for the 4GB RPi4 we talk about less than doubling the price.
And at least for the NanoPi and the RockPi, they both run without issues with the 'RPi 4 PSU'... That's how I mostly power them for testing and development.

[TheMindVirus]

Have you seen what people have been able to do once mPCIe has been added to a Pi?:
https://www.tindie.com/products/m2m/diy ... n-gateway/
This is a Full 8-ch LoRa Concentrator (Network Gateway) using the pins on PCIe to do SPI communication between the FPGA and the Pi.
LoRa is a Long Range Low Power Radio Technology between 400-950MHz, designed for IoT.

[chwe]

Have you seen what people have been able to do once mPCIe has been added to a Pi?:
https://www.tindie.com/products/m2m/diy ... n-gateway/
This is a Full 8-ch LoRa Concentrator (Network Gateway) using the pins on PCIe to do SPI communication between the FPGA and the Pi.
LoRa is a Long Range Low Power Radio Technology between 400-950MHz, designed for IoT.

which has nothing to do with PCIe at all.. except RAK833 uses a mPCIe connector but it's a simple SPI communication, nothing to do with the highspeed interfaces requested/supposed by the OP.

[mahjongg]

not again....

locking....